001/*
002 *  This file is part of the Jikes RVM project (http://jikesrvm.org).
003 *
004 *  This file is licensed to You under the Eclipse Public License (EPL);
005 *  You may not use this file except in compliance with the License. You
006 *  may obtain a copy of the License at
007 *
008 *      http://www.opensource.org/licenses/eclipse-1.0.php
009 *
010 *  See the COPYRIGHT.txt file distributed with this work for information
011 *  regarding copyright ownership.
012 */
013package org.jikesrvm.compilers.opt.lir2mir.ia32_64;
014
015import static org.jikesrvm.compilers.opt.ir.Operators.*;
016import static org.jikesrvm.compilers.opt.lir2mir.ia32_64.BURS_Definitions.*;
017
018import org.jikesrvm.*;
019import org.jikesrvm.compilers.opt.*;
020import org.jikesrvm.compilers.opt.depgraph.DepGraphNode;
021import org.jikesrvm.compilers.opt.ir.*;
022import org.jikesrvm.compilers.opt.ir.operand.*;
023import org.jikesrvm.compilers.opt.ir.operand.ia32.*;
024import org.jikesrvm.compilers.opt.lir2mir.AbstractBURS_TreeNode;
025
026import org.vmmagic.pragma.Inline;
027
028/**
029 * An BURS_TreeNode is a node in a binary tree that is fed
030 * as input to BURS.
031 * <p>
032 * Machine-generated, do not edit! If you need to make changes
033 * to this file, edit BURS_TreeNode.template.
034 *
035 * @see org.jikesrvm.compilers.opt.lir2mir.BURS
036 * @see BURS_STATE
037 */
038public class BURS_TreeNode extends AbstractBURS_TreeNode {
039
040  /**
041   * Constructor for interior node.
042   *
043   * @param n corresponding node from the dependence graph
044   */
045  public BURS_TreeNode(DepGraphNode n) {
046    super(n);
047  }
048
049  /**
050   * Constructor for leaf/auxiliary node.
051   *
052   * @param opcode the opcode to use for the node
053   */
054  public BURS_TreeNode(char opcode) {
055    super(opcode);
056  }
057
058/**** remainder will be inserted by the BURS generator *********/
059
060// program generated file, do not edit
061
062  // cost for each non-terminal
063  private char cost_stm;
064  private char cost_r;
065  private char cost_czr;
066  private char cost_cz;
067  private char cost_szpr;
068  private char cost_szp;
069  private char cost_riv;
070  private char cost_rlv;
071  private char cost_any;
072  private char cost_load32;
073  private char cost_uload8;
074  private char cost_load8_16_32;
075  private char cost_load16_32;
076  private char cost_load16;
077  private char cost_address1scaledreg;
078  private char cost_address1reg;
079  private char cost_address;
080  private char cost_bittest;
081  private char cost_boolcmp;
082  private char cost_load64;
083  private char cost_load8;
084  private char cost_sload16;
085  private char cost_uload16;
086  private char cost_sload8;
087  private char cost_load8_16_32_64;
088  private char cost_float_load;
089  private char cost_double_load;
090
091  // rule for each non-terminal
092  private int word0;
093     // stm; word:0 offset:0, bits:8, 223 rules);
094     // r; word:0 offset:8, bits:9, 257 rules);
095     // czr; word:0 offset:17, bits:4, 15 rules);
096     // cz; word:0 offset:21, bits:2, 2 rules);
097     // szpr; word:0 offset:23, bits:6, 43 rules);
098  private int word1;
099     // szp; word:1 offset:0, bits:4, 8 rules);
100     // riv; word:1 offset:4, bits:2, 2 rules);
101     // rlv; word:1 offset:6, bits:2, 2 rules);
102     // any; word:1 offset:8, bits:3, 5 rules);
103     // load32; word:1 offset:11, bits:3, 7 rules);
104     // uload8; word:1 offset:14, bits:3, 4 rules);
105     // load8_16_32; word:1 offset:17, bits:2, 2 rules);
106     // load16_32; word:1 offset:19, bits:2, 2 rules);
107     // load16; word:1 offset:21, bits:2, 3 rules);
108     // address1scaledreg; word:1 offset:23, bits:3, 5 rules);
109     // address1reg; word:1 offset:26, bits:3, 6 rules);
110  private int word2;
111     // address; word:2 offset:0, bits:4, 13 rules);
112     // bittest; word:2 offset:4, bits:4, 10 rules);
113     // boolcmp; word:2 offset:8, bits:4, 13 rules);
114     // load64; word:2 offset:12, bits:3, 5 rules);
115     // load8; word:2 offset:15, bits:2, 3 rules);
116     // sload16; word:2 offset:17, bits:3, 4 rules);
117     // uload16; word:2 offset:20, bits:3, 4 rules);
118     // sload8; word:2 offset:23, bits:2, 3 rules);
119     // load8_16_32_64; word:2 offset:25, bits:2, 2 rules);
120     // float_load; word:2 offset:27, bits:3, 4 rules);
121  private int word3;
122     // double_load; word:3 offset:0, bits:3, 5 rules);
123
124  public final char getCost(int goalNT) {
125    switch(goalNT) {
126    case stm_NT:    return cost_stm;
127    case r_NT:    return cost_r;
128    case czr_NT:    return cost_czr;
129    case cz_NT:    return cost_cz;
130    case szpr_NT:    return cost_szpr;
131    case szp_NT:    return cost_szp;
132    case riv_NT:    return cost_riv;
133    case rlv_NT:    return cost_rlv;
134    case any_NT:    return cost_any;
135    case load32_NT:    return cost_load32;
136    case uload8_NT:    return cost_uload8;
137    case load8_16_32_NT:    return cost_load8_16_32;
138    case load16_32_NT:    return cost_load16_32;
139    case load16_NT:    return cost_load16;
140    case address1scaledreg_NT:    return cost_address1scaledreg;
141    case address1reg_NT:    return cost_address1reg;
142    case address_NT:    return cost_address;
143    case bittest_NT:    return cost_bittest;
144    case boolcmp_NT:    return cost_boolcmp;
145    case load64_NT:    return cost_load64;
146    case load8_NT:    return cost_load8;
147    case sload16_NT:    return cost_sload16;
148    case uload16_NT:    return cost_uload16;
149    case sload8_NT:    return cost_sload8;
150    case load8_16_32_64_NT:    return cost_load8_16_32_64;
151    case float_load_NT:    return cost_float_load;
152    default:       return cost_double_load;
153    }
154  }
155
156  public final void setCost(int goalNT, char cost) {
157    switch(goalNT) {
158    case stm_NT:    cost_stm = cost; break;
159    case r_NT:    cost_r = cost; break;
160    case czr_NT:    cost_czr = cost; break;
161    case cz_NT:    cost_cz = cost; break;
162    case szpr_NT:    cost_szpr = cost; break;
163    case szp_NT:    cost_szp = cost; break;
164    case riv_NT:    cost_riv = cost; break;
165    case rlv_NT:    cost_rlv = cost; break;
166    case any_NT:    cost_any = cost; break;
167    case load32_NT:    cost_load32 = cost; break;
168    case uload8_NT:    cost_uload8 = cost; break;
169    case load8_16_32_NT:    cost_load8_16_32 = cost; break;
170    case load16_32_NT:    cost_load16_32 = cost; break;
171    case load16_NT:    cost_load16 = cost; break;
172    case address1scaledreg_NT:    cost_address1scaledreg = cost; break;
173    case address1reg_NT:    cost_address1reg = cost; break;
174    case address_NT:    cost_address = cost; break;
175    case bittest_NT:    cost_bittest = cost; break;
176    case boolcmp_NT:    cost_boolcmp = cost; break;
177    case load64_NT:    cost_load64 = cost; break;
178    case load8_NT:    cost_load8 = cost; break;
179    case sload16_NT:    cost_sload16 = cost; break;
180    case uload16_NT:    cost_uload16 = cost; break;
181    case sload8_NT:    cost_sload8 = cost; break;
182    case load8_16_32_64_NT:    cost_load8_16_32_64 = cost; break;
183    case float_load_NT:    cost_float_load = cost; break;
184    default:       cost_double_load = cost; break;
185    }
186  }
187
188  @Override
189  public final void initCost() {
190    cost_stm = 
191    cost_r = 
192    cost_czr = 
193    cost_cz = 
194    cost_szpr = 
195    cost_szp = 
196    cost_riv = 
197    cost_rlv = 
198    cost_any = 
199    cost_load32 = 
200    cost_uload8 = 
201    cost_load8_16_32 = 
202    cost_load16_32 = 
203    cost_load16 = 
204    cost_address1scaledreg = 
205    cost_address1reg = 
206    cost_address = 
207    cost_bittest = 
208    cost_boolcmp = 
209    cost_load64 = 
210    cost_load8 = 
211    cost_sload16 = 
212    cost_uload16 = 
213    cost_sload8 = 
214    cost_load8_16_32_64 = 
215    cost_float_load = 
216    cost_double_load = 
217          0x7fff;
218    word0 = 0;
219    word1 = 0;
220    word2 = 0;
221    word3 = 0;
222
223  }
224
225  @Override
226  public final void writePacked(int word, int mask, int shiftedValue) {
227
228    switch(word) {
229    case 0: word0 = (word0 & mask) | shiftedValue; break;
230    case 1: word1 = (word1 & mask) | shiftedValue; break;
231    case 2: word2 = (word2 & mask) | shiftedValue; break;
232    case 3: word3 = (word3 & mask) | shiftedValue; break;
233
234    default: OptimizingCompilerException.UNREACHABLE();
235    }
236
237  }
238
239  @Override
240  public final int readPacked(int word, int shift, int mask) {
241
242    switch(word) {
243    case 0: return (word0 >>> shift) & mask;
244    case 1: return (word1 >>> shift) & mask;
245    case 2: return (word2 >>> shift) & mask;
246    case 3: return (word3 >>> shift) & mask;
247
248    default: OptimizingCompilerException.UNREACHABLE(); return -1;
249    }
250
251  }
252
253  /**
254   * Get the BURS rule number associated with this tree node for a given non-terminal
255   *
256   * @param goalNT the non-terminal we want to know the rule for (e.g. stm_NT)
257   * @return the rule number
258   */
259  @Inline
260  public final int rule(int goalNT) {
261    int stateNT;
262    switch(goalNT) {
263    case stm_NT:
264      stateNT = readPacked(0, 0, 0xFF);
265      break;
266    case r_NT:
267      stateNT = readPacked(0, 8, 0x1FF);
268      break;
269    case czr_NT:
270      stateNT = readPacked(0, 17, 0xF);
271      break;
272    case cz_NT:
273      stateNT = readPacked(0, 21, 0x3);
274      break;
275    case szpr_NT:
276      stateNT = readPacked(0, 23, 0x3F);
277      break;
278    case szp_NT:
279      stateNT = readPacked(1, 0, 0xF);
280      break;
281    case riv_NT:
282      stateNT = readPacked(1, 4, 0x3);
283      break;
284    case rlv_NT:
285      stateNT = readPacked(1, 6, 0x3);
286      break;
287    case any_NT:
288      stateNT = readPacked(1, 8, 0x7);
289      break;
290    case load32_NT:
291      stateNT = readPacked(1, 11, 0x7);
292      break;
293    case uload8_NT:
294      stateNT = readPacked(1, 14, 0x7);
295      break;
296    case load8_16_32_NT:
297      stateNT = readPacked(1, 17, 0x3);
298      break;
299    case load16_32_NT:
300      stateNT = readPacked(1, 19, 0x3);
301      break;
302    case load16_NT:
303      stateNT = readPacked(1, 21, 0x3);
304      break;
305    case address1scaledreg_NT:
306      stateNT = readPacked(1, 23, 0x7);
307      break;
308    case address1reg_NT:
309      stateNT = readPacked(1, 26, 0x7);
310      break;
311    case address_NT:
312      stateNT = readPacked(2, 0, 0xF);
313      break;
314    case bittest_NT:
315      stateNT = readPacked(2, 4, 0xF);
316      break;
317    case boolcmp_NT:
318      stateNT = readPacked(2, 8, 0xF);
319      break;
320    case load64_NT:
321      stateNT = readPacked(2, 12, 0x7);
322      break;
323    case load8_NT:
324      stateNT = readPacked(2, 15, 0x3);
325      break;
326    case sload16_NT:
327      stateNT = readPacked(2, 17, 0x7);
328      break;
329    case uload16_NT:
330      stateNT = readPacked(2, 20, 0x7);
331      break;
332    case sload8_NT:
333      stateNT = readPacked(2, 23, 0x3);
334      break;
335    case load8_16_32_64_NT:
336      stateNT = readPacked(2, 25, 0x3);
337      break;
338    case float_load_NT:
339      stateNT = readPacked(2, 27, 0x7);
340      break;
341    default: // double_load_NT
342      stateNT = readPacked(3, 0, 0x7);
343      break;
344    }
345    return BURS_STATE.decode(goalNT, stateNT);
346  }
347}
348