001/* 002 * This file is part of the Jikes RVM project (http://jikesrvm.org). 003 * 004 * This file is licensed to You under the Eclipse Public License (EPL); 005 * You may not use this file except in compliance with the License. You 006 * may obtain a copy of the License at 007 * 008 * http://www.opensource.org/licenses/eclipse-1.0.php 009 * 010 * See the COPYRIGHT.txt file distributed with this work for information 011 * regarding copyright ownership. 012 */ 013package org.jikesrvm.compilers.opt.lir2mir.ia32_32; 014 015import static org.jikesrvm.compilers.opt.ir.Operators.*; 016import static org.jikesrvm.compilers.opt.lir2mir.ia32_32.BURS_Definitions.*; 017 018import org.jikesrvm.*; 019import org.jikesrvm.compilers.opt.*; 020import org.jikesrvm.compilers.opt.depgraph.DepGraphNode; 021import org.jikesrvm.compilers.opt.ir.*; 022import org.jikesrvm.compilers.opt.ir.operand.*; 023import org.jikesrvm.compilers.opt.ir.operand.ia32.*; 024import org.jikesrvm.compilers.opt.lir2mir.AbstractBURS_TreeNode; 025 026import org.vmmagic.pragma.Inline; 027 028/** 029 * An BURS_TreeNode is a node in a binary tree that is fed 030 * as input to BURS. 031 * <p> 032 * Machine-generated, do not edit! If you need to make changes 033 * to this file, edit BURS_TreeNode.template. 034 * 035 * @see org.jikesrvm.compilers.opt.lir2mir.BURS 036 * @see BURS_STATE 037 */ 038public class BURS_TreeNode extends AbstractBURS_TreeNode { 039 040 /** 041 * Constructor for interior node. 042 * 043 * @param n corresponding node from the dependence graph 044 */ 045 public BURS_TreeNode(DepGraphNode n) { 046 super(n); 047 } 048 049 /** 050 * Constructor for leaf/auxiliary node. 051 * 052 * @param opcode the opcode to use for the node 053 */ 054 public BURS_TreeNode(char opcode) { 055 super(opcode); 056 } 057 058/**** remainder will be inserted by the BURS generator *********/ 059 060// program generated file, do not edit 061 062 // cost for each non-terminal 063 private char cost_stm; 064 private char cost_r; 065 private char cost_czr; 066 private char cost_cz; 067 private char cost_szpr; 068 private char cost_szp; 069 private char cost_riv; 070 private char cost_rlv; 071 private char cost_any; 072 private char cost_load32; 073 private char cost_uload8; 074 private char cost_load8_16_32; 075 private char cost_load16_32; 076 private char cost_load16; 077 private char cost_address; 078 private char cost_address1scaledreg; 079 private char cost_address1reg; 080 private char cost_bittest; 081 private char cost_boolcmp; 082 private char cost_load8; 083 private char cost_sload16; 084 private char cost_load64; 085 private char cost_uload16; 086 private char cost_sload8; 087 private char cost_float_load; 088 private char cost_double_load; 089 090 // rule for each non-terminal 091 private int word0; 092 // stm; word:0 offset:0, bits:8, 190 rules); 093 // r; word:0 offset:8, bits:8, 242 rules); 094 // czr; word:0 offset:16, bits:3, 7 rules); 095 // cz; word:0 offset:19, bits:2, 2 rules); 096 // szpr; word:0 offset:21, bits:5, 22 rules); 097 // szp; word:0 offset:26, bits:3, 5 rules); 098 // riv; word:0 offset:29, bits:2, 2 rules); 099 private int word1; 100 // rlv; word:1 offset:0, bits:2, 2 rules); 101 // any; word:1 offset:2, bits:3, 5 rules); 102 // load32; word:1 offset:5, bits:3, 7 rules); 103 // uload8; word:1 offset:8, bits:3, 4 rules); 104 // load8_16_32; word:1 offset:11, bits:2, 2 rules); 105 // load16_32; word:1 offset:13, bits:2, 2 rules); 106 // load16; word:1 offset:15, bits:2, 3 rules); 107 // address; word:1 offset:17, bits:4, 8 rules); 108 // address1scaledreg; word:1 offset:21, bits:3, 4 rules); 109 // address1reg; word:1 offset:24, bits:3, 4 rules); 110 // bittest; word:1 offset:27, bits:4, 10 rules); 111 private int word2; 112 // boolcmp; word:2 offset:0, bits:4, 10 rules); 113 // load8; word:2 offset:4, bits:2, 3 rules); 114 // sload16; word:2 offset:6, bits:3, 4 rules); 115 // load64; word:2 offset:9, bits:3, 4 rules); 116 // uload16; word:2 offset:12, bits:3, 4 rules); 117 // sload8; word:2 offset:15, bits:2, 3 rules); 118 // float_load; word:2 offset:17, bits:3, 4 rules); 119 // double_load; word:2 offset:20, bits:3, 5 rules); 120 121 public final char getCost(int goalNT) { 122 switch(goalNT) { 123 case stm_NT: return cost_stm; 124 case r_NT: return cost_r; 125 case czr_NT: return cost_czr; 126 case cz_NT: return cost_cz; 127 case szpr_NT: return cost_szpr; 128 case szp_NT: return cost_szp; 129 case riv_NT: return cost_riv; 130 case rlv_NT: return cost_rlv; 131 case any_NT: return cost_any; 132 case load32_NT: return cost_load32; 133 case uload8_NT: return cost_uload8; 134 case load8_16_32_NT: return cost_load8_16_32; 135 case load16_32_NT: return cost_load16_32; 136 case load16_NT: return cost_load16; 137 case address_NT: return cost_address; 138 case address1scaledreg_NT: return cost_address1scaledreg; 139 case address1reg_NT: return cost_address1reg; 140 case bittest_NT: return cost_bittest; 141 case boolcmp_NT: return cost_boolcmp; 142 case load8_NT: return cost_load8; 143 case sload16_NT: return cost_sload16; 144 case load64_NT: return cost_load64; 145 case uload16_NT: return cost_uload16; 146 case sload8_NT: return cost_sload8; 147 case float_load_NT: return cost_float_load; 148 default: return cost_double_load; 149 } 150 } 151 152 public final void setCost(int goalNT, char cost) { 153 switch(goalNT) { 154 case stm_NT: cost_stm = cost; break; 155 case r_NT: cost_r = cost; break; 156 case czr_NT: cost_czr = cost; break; 157 case cz_NT: cost_cz = cost; break; 158 case szpr_NT: cost_szpr = cost; break; 159 case szp_NT: cost_szp = cost; break; 160 case riv_NT: cost_riv = cost; break; 161 case rlv_NT: cost_rlv = cost; break; 162 case any_NT: cost_any = cost; break; 163 case load32_NT: cost_load32 = cost; break; 164 case uload8_NT: cost_uload8 = cost; break; 165 case load8_16_32_NT: cost_load8_16_32 = cost; break; 166 case load16_32_NT: cost_load16_32 = cost; break; 167 case load16_NT: cost_load16 = cost; break; 168 case address_NT: cost_address = cost; break; 169 case address1scaledreg_NT: cost_address1scaledreg = cost; break; 170 case address1reg_NT: cost_address1reg = cost; break; 171 case bittest_NT: cost_bittest = cost; break; 172 case boolcmp_NT: cost_boolcmp = cost; break; 173 case load8_NT: cost_load8 = cost; break; 174 case sload16_NT: cost_sload16 = cost; break; 175 case load64_NT: cost_load64 = cost; break; 176 case uload16_NT: cost_uload16 = cost; break; 177 case sload8_NT: cost_sload8 = cost; break; 178 case float_load_NT: cost_float_load = cost; break; 179 default: cost_double_load = cost; break; 180 } 181 } 182 183 @Override 184 public final void initCost() { 185 cost_stm = 186 cost_r = 187 cost_czr = 188 cost_cz = 189 cost_szpr = 190 cost_szp = 191 cost_riv = 192 cost_rlv = 193 cost_any = 194 cost_load32 = 195 cost_uload8 = 196 cost_load8_16_32 = 197 cost_load16_32 = 198 cost_load16 = 199 cost_address = 200 cost_address1scaledreg = 201 cost_address1reg = 202 cost_bittest = 203 cost_boolcmp = 204 cost_load8 = 205 cost_sload16 = 206 cost_load64 = 207 cost_uload16 = 208 cost_sload8 = 209 cost_float_load = 210 cost_double_load = 211 0x7fff; 212 word0 = 0; 213 word1 = 0; 214 word2 = 0; 215 216 } 217 218 @Override 219 public final void writePacked(int word, int mask, int shiftedValue) { 220 221 switch(word) { 222 case 0: word0 = (word0 & mask) | shiftedValue; break; 223 case 1: word1 = (word1 & mask) | shiftedValue; break; 224 case 2: word2 = (word2 & mask) | shiftedValue; break; 225 226 default: OptimizingCompilerException.UNREACHABLE(); 227 } 228 229 } 230 231 @Override 232 public final int readPacked(int word, int shift, int mask) { 233 234 switch(word) { 235 case 0: return (word0 >>> shift) & mask; 236 case 1: return (word1 >>> shift) & mask; 237 case 2: return (word2 >>> shift) & mask; 238 239 default: OptimizingCompilerException.UNREACHABLE(); return -1; 240 } 241 242 } 243 244 /** 245 * Get the BURS rule number associated with this tree node for a given non-terminal 246 * 247 * @param goalNT the non-terminal we want to know the rule for (e.g. stm_NT) 248 * @return the rule number 249 */ 250 @Inline 251 public final int rule(int goalNT) { 252 int stateNT; 253 switch(goalNT) { 254 case stm_NT: 255 stateNT = readPacked(0, 0, 0xFF); 256 break; 257 case r_NT: 258 stateNT = readPacked(0, 8, 0xFF); 259 break; 260 case czr_NT: 261 stateNT = readPacked(0, 16, 0x7); 262 break; 263 case cz_NT: 264 stateNT = readPacked(0, 19, 0x3); 265 break; 266 case szpr_NT: 267 stateNT = readPacked(0, 21, 0x1F); 268 break; 269 case szp_NT: 270 stateNT = readPacked(0, 26, 0x7); 271 break; 272 case riv_NT: 273 stateNT = readPacked(0, 29, 0x3); 274 break; 275 case rlv_NT: 276 stateNT = readPacked(1, 0, 0x3); 277 break; 278 case any_NT: 279 stateNT = readPacked(1, 2, 0x7); 280 break; 281 case load32_NT: 282 stateNT = readPacked(1, 5, 0x7); 283 break; 284 case uload8_NT: 285 stateNT = readPacked(1, 8, 0x7); 286 break; 287 case load8_16_32_NT: 288 stateNT = readPacked(1, 11, 0x3); 289 break; 290 case load16_32_NT: 291 stateNT = readPacked(1, 13, 0x3); 292 break; 293 case load16_NT: 294 stateNT = readPacked(1, 15, 0x3); 295 break; 296 case address_NT: 297 stateNT = readPacked(1, 17, 0xF); 298 break; 299 case address1scaledreg_NT: 300 stateNT = readPacked(1, 21, 0x7); 301 break; 302 case address1reg_NT: 303 stateNT = readPacked(1, 24, 0x7); 304 break; 305 case bittest_NT: 306 stateNT = readPacked(1, 27, 0xF); 307 break; 308 case boolcmp_NT: 309 stateNT = readPacked(2, 0, 0xF); 310 break; 311 case load8_NT: 312 stateNT = readPacked(2, 4, 0x3); 313 break; 314 case sload16_NT: 315 stateNT = readPacked(2, 6, 0x7); 316 break; 317 case load64_NT: 318 stateNT = readPacked(2, 9, 0x7); 319 break; 320 case uload16_NT: 321 stateNT = readPacked(2, 12, 0x7); 322 break; 323 case sload8_NT: 324 stateNT = readPacked(2, 15, 0x3); 325 break; 326 case float_load_NT: 327 stateNT = readPacked(2, 17, 0x7); 328 break; 329 default: // double_load_NT 330 stateNT = readPacked(2, 20, 0x7); 331 break; 332 } 333 return BURS_STATE.decode(goalNT, stateNT); 334 } 335} 336